Discriminator function for GPS code alignment

ABSTRACT

Embodiments of the present invention pertain generally to methods and systems of processing a global positioning satellite (GPS) signal. More particularly, embodiments of the present invention provide an improved discriminator function that utilizes the early, prompt, and late correlator values. For example, the improved discriminator function may be normalized based on all three of the early, prompt, and late correlator values. The improved discriminator function behaves linearly across a prescribed region whose width depends on the separation between correlators.

DESCRIPTION OF THE EMBODIMENTS

1. Field of the Invention

The subject matter of this disclosure generally relates to globalpositioning system (GPS) signals. More particularly, the subject matterof this disclosure pertains to methods and systems that can provide codealignment for GPS signal processing.

2. Background of the Invention

The global positioning system (GPS) may be used for determining theposition of a user on or near the earth from signals received frommultiple orbiting satellites. The orbits of the GPS satellites arearranged in multiple planes, in order that signals can be received fromat least four GPS satellites at any selected point on or near the earth.

Each satellite transmits two spread-spectrum signals in the L band,known as L1 and L2, with separate carrier frequencies. L1 is at anominal center frequency of 1575.42 MHz and L2 is at a nominal centerfrequency of 1227.60 MHz. The two signals are used to eliminate errorsthat may arise due to the dispersion of the transmitted signals by theionosphere. Each satellite uses at least one of two pseudorandom noise(PRN) codes that are unique to that satellite to modulate its carriersignals. This allows the L-band signals from a number of satellites tobe individually identified and separated in a receiver. Each carrier isalso modulated by a slower-varying data signal defining the satelliteorbits and other system information. One of the PRN codes is referred toas the C/A (coarse/acquisition) code, while the second is known as the P(precise) code.

Two signals are broadcast on the L1 frequency, a coarse/acquisition(C/A) and an encrypted precision ranging P(Y) code. The C/A code istypically delayed by 90 degrees in carrier phase from the P(Y) code. TheC/A code is a PRN Gold code of 1023 chips, run at a chipping rate of1.023 MHz, resulting in a null-to-null bandwidth of 2.046 MHz and arepetition rate of 1 millisecond. One use for the C/A code is that itmay be used to synchronize the receiver with the longer P(Y) code, whichis generated by the Modulo-2 addition (i.e., a logical Exclusive ORoperation) of two code sequences of 15,345,000 chips and 15,345,037chips, respectively. Different satellites will have different sequences.The resulting P(Y) code has a period of 7 days. At a chipping rate of10.23 MHz, the P(Y) code has a null-to-null bandwidth of 20.46 MHz. Thesystem broadcasts only the P(Y) code on the L2 frequency.

In the conventional GPS receiver, replicas of the P-code and C/A codemay be locally generated in the same manner as in the satellite. The L1and L2 signals from a given satellite are demodulated by aligning thephases, i.e., by adjusting the timing, of the locally-generated codeswith those modulated onto the signals from that satellite. In order toachieve such phase alignment, the locally generated code replicas arecorrelated with the received signals and the phase of the locallygenerated code is adjusted to bring the signals into temporal alignment.Each chip in the code in the received signal arrives at a low power thatis below the noise level. In order to obtain a detectable signal, thereceived signal is repeatedly added across all the chips. A startingtime of each epoch of the received C/A code may then be determined fromthis operation. Since the starting time of each transmitted epoch isdefined, the time of receipt can be used as a measure of the transittime or range to the satellite. Again, because the C/A and P-codes areunique to each satellite, a specific satellite may be identified basedon the results of the correlations between the received signals and thelocally-generated C/A and P-code replicas. Therefore, aligning thelocally-generated C/A and P-code replicas with those received from thesatellite is critical to the operation of a GPS receiver.

In order to align the locally-generated C/A code with the unique C/Acode in a satellite's signal, a GPS receiver will use what is known as adiscriminator function. A conventional GPS receiver will take thelocally-generated C/A code replica (known as the prompt code) and timeshift it forward or backward in time by half a chip or less to producean early code and a late code. The early and late codes are thencorrelated with the incoming C/A code in the signal from the GPSsatellite. This correlation operation produces results that are squaredto obtain two correlator powers (Pe and Pl), which are then input intothe discriminator function. The discriminator function will compare thetwo correlator powers and produce an output. The output is used as acontrol signal in a delay lock loop (DLL) to adjust the rate of thelocally generated C/A code to align it with the C/A code of the signalfrom the GPS satellite.

FIG. 6 illustrates an exemplary output of a typical discriminator. For atypical discriminator, the output is a curve 600 having a centralportion 602 that is linear or nearly linear. However, typicaldiscriminators exhibit some form of saturation, which is illustrated bycurve 600 having limiting value at its two extremes, as shown byportions 604 and 606.

Two key attributes of a discriminator's output are the slope of curve600 at the zero crossing 608 and the limiting value as it saturates. Theslope at the zero crossing influences the bandwidth of the DLL. Largerslopes mean larger bandwidths. While larger bandwidths allow the DLL torespond more quickly to a misalignment, they also increase the impact ofnoise on the result. Proper design of the DLL involves a well chosenbalance between responsiveness and noise sensitivity. In order tocompare different discriminators, it is common practice to normalizetheir outputs to have the same slope at the zero crossing.

A normalized early-minus-late discriminator function for a discriminatormay be calculated as follows:D=½(1−Δ)(Pe−Pl)/(Pe+Pl), where

-   -   D is the discriminator output;    -   Δ is half the separation between the early and late correlators;    -   Pe is the correlator power for the early code; and    -   Pl is the correlator power for the late code.        In FIG. 6, the exemplary output of a typical code discriminator        has been calculated, where Δ=half a chip width and the curve has        been normalized so that the slope is 1 at the zero crossing 608.

Assuming that two discriminator candidates have both been normalized tohave the same slope at the zero crossing, the magnitude of the limitingvalue at saturation is also of interest. This characteristic affectswhat is known as the “pull-in” capability of the DLL. The larger thesaturation value, the faster the DLL can pull the local C/A code intoalignment with the received C/A code during acquisition phase. Thatmeans that for two discriminator candidates that have been normalized tohave the same slope at the zero crossing, the one that produces thegreater range of output values is preferable from an overall performanceview.

Accordingly, it would be desirable to provide methods and systems thatprovide good bandwidth and pull-in performance. It would also bedesirable to provide improved discriminator methods and systems.

SUMMARY OF THE INVENTION

In accordance with one feature of the present invention, a method ofaligning a local code with a code in a received signal comprises:generating a prompt replica of the local code; generating a late replicaof the local code and an early replica of the local code based onshifting the prompt replica by half of a chip at most; correlating theearly, prompt, and late replicas of the local code with the receivedsignal; determining an early correlator power, a prompt correlatorpower, and a late correlator power based on the correlations of thereplicas of the local code with the received signal; calculating adiscrimination output in which the normalization relies not only on theearly correlator power and the late correlator power, but also theprompt correlator power; and adjusting a rate of the local code based onthe discrimination output.

In accordance with another feature of the present invention, anapparatus for aligning a local code with a code in a received signalcomprises: means for generating a prompt replica of the local code;means for generating a late replica of the local code and an earlyreplica of the local code based on shifting the prompt replica by halfof a chip at most in opposite directions; means for correlating theearly, prompt, and late replicas of the local code with the receivedsignal; means for determining an early correlator power, a promptcorrelator power, and a late correlator power based on the correlationsof the replicas of the local code with the received signal; means forcalculating a discrimination output based not only on the earlycorrelator power and the late correlator power, but also the promptcorrelator power; and means for adjusting a rate of the local code basedon the discrimination output.

In accordance with another feature of the present invention, a delaylock loop is configured to track a pseudo random noise code in areceived signal. The delay lock loop comprises: a code generator thatgenerates a prompt replica of the local code, a late replica of thelocal code and an early replica of the local code based on shifting theprompt replica by half of a chip at most; a demodulator configured tocorrelate the early, prompt, and late replicas of the local code withthe received signal; a processor configured to calculate an earlycorrelator power, a prompt correlator power, and a late correlator powerbased on the correlations of the replicas of the local code with thereceived signal; a code discriminator configured to calculate a properlynormalized discrimination output based on the early correlator power,the prompt correlator power, and the late correlator power; and afeedback module configured to provide a signal that indicates anadjustment to a rate of the local code generated by the code generatorbased on the discrimination output.

It is to be understood that both the foregoing general description andthe following detailed description are exemplary and explanatory onlyand are not restrictive of the invention, as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated in and constitute apart of this specification, illustrate several embodiments of theinvention and together with the description, serve to explain theprinciples of the invention.

FIG. 1 illustrates a block diagram of a GPS receiver in accordance withan embodiment of the invention;

FIG. 2 illustrates a more detailed block diagram of the signalprocessing module shown in FIG. 1 in accordance with another embodimentof the invention;

FIG. 3 illustrates an ideal correlator amplitude output;

FIG. 4 illustrates an ideal correlator power output;

FIG. 5 illustrates an ideal correlator output along with a correlatoroutput that has been affected by multipath signals;

FIG. 6 illustrates an exemplary output of a typical code discriminator;and

FIG. 7 illustrates exemplary outputs of a typical code discriminator anda discriminator that is in accordance with embodiments of the invention.

DESCRIPTION OF THE EMBODIMENTS

Embodiments of the present invention pertain generally to methods andsystems of processing a global positioning satellite (GPS) signal. Moreparticularly, embodiments of the present invention provide an improveddiscriminator function that utilizes the early, prompt, and latecorrelator power values. For example, the improved discriminatorfunction may be normalized based on all three of the early, prompt, andlate correlator values. The improved discriminator function behaveslinearly across a prescribed region whose width depends on theseparation between correlators.

In some embodiments, the separation between correlators may be evenlyspaced, such as +/−½ chip. In other embodiments, the separation betweencorrelators may be different to account for multipath signals. Forexample, the spacing between the prompt and late correlator values maybe less than the spacing used for the early and prompt correlatorvalues.

In addition, embodiments of the present invention may perform I and Qprocessing with IF signals and with signals that arise in basebandsystems. Either technique may be used in embodiments of the presentinvention.

FIG. 7 shows a comparison of the normalized outputs for a typicaldiscriminator and a discriminator that is in accordance with embodimentsof the invention. In FIG. 7, the output of a typical discriminator isshown again as curve 600, while the output of a discriminator that is inaccordance with embodiments of the invention is shown as curve 700. Asin FIG. 6, curves 600 and 700 have been calculated where Δ=half a chipwidth and have been normalized so that the slope is 1 at the zerocrossing 702.

However, as will be explained below, discriminators that are inaccordance with embodiments of the invention will have a linear portion704 that extends over a larger range than that of curve 600. Inaddition, these discriminators may exhibit higher saturation values. Forexample, as shown, portions 706 and 708 of curve 700 saturate at ahigher value than curve 600. Since curves 600 and 700 have the sameslope at the zero crossing 702, this implies they are supporting equalDLL bandwidths. However, as explained above, the discriminator of curve600 will achieve poorer pull-in performance in comparison to thediscriminator of curve 700. Or, the discriminator of curve 700 willexhibit better pull-performance than the typical discriminatorexemplified by curve 600.

In view of the importance of properly establishing the DLL bandwidthwhile also achieving good pull-in performance, one skilled in the artwill recognize that a discriminator whose output behaves more like curve700 may perform better than a typical discriminator, such as the oneexemplified in curve 600.

Reference will now be made in detail to the present exemplaryembodiments of the invention, examples of which are illustrated in theaccompanying drawings. Wherever possible, the same reference numberswill be used throughout the drawings to refer to the same or like parts.

FIG. 1 illustrates a block diagram of a GPS receiver 100 in accordancewith an embodiment of the invention. It should be readily apparent tothose of ordinary skill in the art that the block diagram depicted inFIG. 1 represents a generalized schematic illustration and that othercomponents may be added or existing components may be removed ormodified. Moreover, the GPS receiver 100 may be implemented usingvarious components. These components may be software components,hardware components, firmware, or any combination thereof.

As shown in FIG. 1, the GPS receiver 100 includes a pre-amp module 102,a down conversion module 104, a reference oscillator module 106, afrequency synthesizer module 108, an intermediate frequency demodulator110, a signal processing module 112 and a navigation module 114.

A GPS signal may be received at an omni-directional antenna 116 andfiltered by the pre-amp module 102. The filtered RF signal is thendown-converted by the down conversion module 104.

The down conversion module 104 is driven by a first local oscillatorsignal LO₁ supplied by the frequency synthesizer module 108, whichitself is driven by the reference oscillator 106. In addition, thefrequency synthesizer 108 provides a second local oscillator signal LO₂and a clock signal to the intermediate frequency (IF) module 110. The IFdemodulator 110 may then generate digital in-phase and quadrature (I &Q) channels by multiplication by sine and cosine versions of the secondlocal oscillator signal LO₂.

The signal processing module 112 may be configured to include a carrierloop and a code tracking loop (not shown in FIG. 1). The outputs ofthese loops may include a pseudorange, Doppler, and carrier phase, whichare then processed by the navigation processing module 114 to determinethe receiver's position, velocity, and time.

FIG. 2 illustrates a more detailed block diagram of the signalprocessing module 112 shown in FIG. 1 in accordance with anotherembodiment of the invention. As noted above, in order to track anincoming GPS signal, signal processing module 112 may employ twotracking loops. A delay lock loop (DLL) may be used to track the C/Acode and a phase lock loop (PLL) may be used to track the carrierfrequency of the incoming GPS signal. FIG. 2 illustrates an exemplaryDLL for tracking the C/A code of an incoming GPS signal. As shown, a DLLloop 200 may comprise a code generator 202 and a code numericallycontrolled oscillator (NCO) 204.

Code generator 202 generates three different phases of local replicacodes—Early, Prompt, and Late, which are separated from adjacentneighbors by at most ½ of a chip. The early code is advanced withrespect to the prompt code and the late phase is delayed with respect tothe prompt code. The three codes are inputted to a code demodulator 206where they are multiplied with both the in-phase (I) and quadrature (Q)components of the incoming GPS signal. Code demodulator 206 then outputsthese correlator values to an integrate and dump module 208.

Integrate and dump module 208 filters and squares the early, prompt, andlate correlator values and produces early, prompt, and late correlatorpower values, Pe, Pp, and Pl. The I and Q channels may be processed sideby side and then added to determine the overall correlator power data.The correlator power values are then provided to code discriminator 210.

Code discriminator 210 calculates an output by comparing the correlatorpower values. The output is then fed back to code NCO 204 to generate afeedback signal to code generator 202. Code generator 202 may thenadjust its rate based on the feedback signal.

In some embodiments, code discriminator 210 calculates its output basedon all three correlator powers, Pe, Pp, and Pl. One skilled in the artwill recognize that this is unlike conventional discriminators, whichuse only early and late correlator powers. The following discussionbriefly describes how all three correlator powers may be used by codediscriminator 210.

It is well known that the ideal output of the correlator is asymmetrical triangle function, which is shown in FIG. 3. However, thegraph shown in FIG. 3 is the envelope of the voltage signal produced bythe correlation process. In order to determine correlator power for useby the discriminator function, the correlator output must be squared. Inreceivers that use in-phase (I) and quadrature (Q) signals, bothcomponents are correlated separately, squared and added together toproduce the correlator power. The resulting graph is shown in FIG. 4.

In the graph of correlator output versus correlator shift shown in FIG.4, x represents the correlator shift normalized by the width of a singlecode chip, A represents an overall signal amplitude and B represents andarbitrary additive constant. Letting P(x) represent correlator power asa function of correlator shift x, we have:P(x)=A(1+x)² +B, for −1<x<0P(x)=A(1−x)² +B, for 0<x<1.

For the case of ½ chip spacing between the early and prompt and betweenthe prompt and late correlators, and the correct alignment of the promptcorrelator, we have:Pe=P(−½)=A(1−½)² +B=A/4+B;Pp=P(0)=A+B; andPl=P(½)=A(1−½)² +B=A/4+B.

Now assume that the received signal and the prompt local code aremisaligned by an amount “d.” In this case, the early, prompt and latecorrelator powers are:Pe=P(−½+d)=A(1+(−½+d))² +B=A(½+d)² +B;Pp=P(d)=A(1−|d|)² +B; andPl=P(½+d)=A(1−(½+d))² +B=A(½−d)² +B.

It is noted that the above equations can be combined in order to solvefor the misalignment value “d.” In particular, “d” can be expressedaccording to the equationsd=(Pe−Pl)/( 4/3(Pe−Pp)−4(Pl−Pp)), where 0<=d<=1; andd=(Pe−Pl)/( 4/3(Pl−Pp)−4(Pe−Pp)), where −1<=d<=0.

In order to select which expression to use for “d,” the relative valuesof Pe and Pl are considered. Thus, if Pe>Pl, then the expression for0<=d<=1 is used. Likewise, if Pe<Pl, then the expression for −1<=d<=0 isused.

This quantity d can now be used as the definition of a discriminatorfunction to be used in the delay lock loop. Note that while thenumerator in d depends on the difference between the early and latecorrelator powers just as before, the denominator now involves theprompt correlator power as well. A plot of this discriminator function dversus misalignment x is shown in the curve in FIG. 7. Unlike thediscriminator behavior shown in FIG. 6, discriminators of variousembodiments exhibit linear behavior with a slope of 1 over the entirerange from −½ chip to +½ chip. An example of the performance of such adiscriminator is shown in FIG. 7. It also achieves greater extremevalues than the discriminator shown in FIG. 6, thereby providing betterpull-in performance. This improved performance is a direct result of thealtered form of the denominator contained in this definition of thediscriminator.

Alternatively, in other embodiments, the discriminator function mayaccommodate chip spacings other than +/−½. For example, for an arbitrarychip spacing Δ, the discriminator function of code discriminator 210 maybe expressed as follows:d=Δ(1−Δ/2)(Pe−Pl)/(Δ(Pe−Pp)−(2−Δ)(Pl−Pp)) for Pe>Pl; andd=Δ(1−Δ/2)(Pe−Pl)/(Δ(Pl−Pp)−(2−Δ)(Pe−Pp)) for Pe<Pl,

where Δ may be any arbitrary chip spacing, such as ½ or 1/20.

Of note, the above discriminator function still exhibits the desiredslope of 1 at the zero crossing and is perfectly linear across theinterval (−Δ, Δ).

Accordingly, various embodiments of code discriminator 210 may employunequal spacings between the correlators. For example, the early andprompt correlators may be spaced by ½ a chip, while the prompt and latecorrelators may be spaced by ¼ of a chip. The use of unequal spacingsmay be advantageous in order to deal with multipath signals that areadversely affecting the shape of the correlator function. An example ofthe effect of multipath signals on the correlator function is shown withreference to FIG. 5. Since multipath signals tend to arrive later thanthe direct path signals, the late correlator power may be more affectedby multipath signals. Thus, code discriminator 210 may employ a smallerspacing between the prompt and late correlators to reduce the impact ofmultipath signals.

Certain embodiments may be performed as a computer program. The computerprogram may exist in a variety of forms both active and inactive. Forexample, the computer program can exist as software program(s) comprisedof program instructions in source code, object code, executable code orother formats; firmware program(s); or hardware description language(HDL) files. Any of the above can be embodied on a computer readablemedium, which include storage devices and signals, in compressed oruncompressed form. Exemplary computer readable storage devices includeconventional computer system RAM (random access memory), ROM (read-onlymemory), EPROM (erasable, programmable ROM), EEPROM (electricallyerasable, programmable ROM), and magnetic or optical disks or tapes.Exemplary computer readable signals, whether modulated using a carrieror not, are signals that a computer system hosting or running thepresent invention can be configured to access, including signalsdownloaded through the Internet or other networks. Concrete examples ofthe foregoing include distribution of executable software program(s) ofthe computer program on a CD-ROM or via Internet download. In a sense,the Internet itself, as an abstract entity, is a computer readablemedium. The same is true of computer networks in general.

While the invention has been described with reference to the exemplaryembodiments thereof, those skilled in the art will be able to makevarious modifications to the described embodiments without departingfrom the true spirit and scope. The terms and descriptions used hereinare set forth by way of illustration only and are not meant aslimitations. In particular, although the method has been described byexamples, the steps of the method may be performed in a different orderthan illustrated or simultaneously. Those skilled in the art willrecognize that these and other variations are possible within the spiritand scope as defined in the following claims and their equivalents.

1. A method of aligning a local code with a code in a received signal,said method comprising: generating a prompt replica of the local code;generating a late replica of the local code and an early replica of thelocal code based on shifting the prompt replica by half of a chip atmost; correlating the early, prompt, and late replicas of the local codewith the received signal; determining an early correlator power, aprompt correlator power, and a late correlator power based on thecorrelations of the replicas of the local code with the received signal;calculating a discrimination output based on comparing the earlycorrelator power and the late correlator power and normalizing thecomparison based on the early correlator power, the late correlatorpower, and the prompt correlator power; and adjusting a rate of thelocal code based on the discrimination output.
 2. The method of claim 1,wherein generating the prompt replica of the local code comprisesgenerating the prompt replica of a pseudo-random noise code.
 3. Themethod of claim 1, wherein generating the prompt replica of the localcode comprises generating the prompt replica of a coarse/acquisitioncode used by a global positioning satellite.
 4. The method of claim 1,wherein calculating the discrimination output based on the earlycorrelator power, the prompt correlator power, and the late correlatorpower comprises: determining if the early correlator power is greaterthan the late correlator power; and calculating the discriminationoutput based on a quotient, when the early correlator power is greaterthan the late correlator power, wherein a numerator of the quotient isbased on a difference between the early correlator power and the latecorrelator power and a denominator of the quotient is based on a firstfactor times a difference between the early correlator power and theprompt correlator power and a second factor times a difference betweenthe late correlator power and the prompt correlator power.
 5. The methodof claim 4, wherein calculating the discrimination output based on theearly correlator power, the prompt correlator power, and the latecorrelator power at correlator spacings of ½ chip comprises: calculatingthe discrimination output based on the quotient, when the earlycorrelator power is greater than the late correlator power, wherein thenumerator of the quotient is equal to the difference between the earlycorrelator power and the late correlator power and the denominator ofthe quotient is equal to 4/3 times the difference between the earlycorrelator power and the prompt correlator power minus four times thedifference between the late correlator power and the prompt correlatorpower.
 6. The method of claim 4, wherein calculating the discriminationoutput based on the early correlator power, the prompt correlator power,and the late correlator power at correlator spacings of 1/20 chipcomprises: calculating the discrimination output based on the quotient,when the early correlator power is greater than the late correlatorpower, wherein the numerator of the quotient is equal to two times thedifference between the early correlator power and the late correlatorpower and the denominator of the quotient is equal to 40/39 times thedifference between the early correlator power and the prompt correlatorpower minus 40 times the difference between the late correlator powerand the prompt correlator power.
 7. The method of claim 1, whereincalculating the discrimination output based on the early correlatorpower, the prompt correlator power, and the late correlator powercomprises: determining if the early correlator power is less than thelate correlator power; and calculating the discrimination output basedon a quotient, when the early correlator power is less than the latecorrelator power, wherein a numerator of the quotient is based on adifference between the early correlator power and the late correlatorpower and a denominator of the quotient is based on a first factor timesa difference between the late correlator power and the prompt correlatorpower and a second factor times a difference between the earlycorrelator power and the prompt correlator power.
 8. The method of claim7, wherein calculating the discrimination output based on the earlycorrelator power, the prompt correlator power, and the late correlatorpower at correlator spacings of ½ chip comprises: calculating thediscrimination output based on the quotient, when the early correlatorpower is less than the late correlator power, wherein the numerator ofthe quotient is equal to the difference between the early correlatorpower and the late correlator power and the denominator of the quotientis equal to 4/3 times the difference between the late correlator powerand the prompt correlator power minus four times the difference betweenthe early correlator power and the prompt correlator power.
 9. Themethod of claim 7, wherein calculating the discrimination output basedon the early correlator power, the prompt correlator power, and the latecorrelator power at correlator spacings of 1/20 chip comprises:calculating the discrimination output based on the quotient, when theearly correlator power is less than the late correlator power, whereinthe numerator of the quotient is equal to two times the differencebetween the early correlator power and the late correlator power and thedenominator of the quotient is equal to 40/39 times the differencebetween the late correlator power and the prompt correlator power minus40 times the difference between the early correlator power and theprompt correlator power.
 10. An apparatus for aligning a local code witha code in a received signal, said apparatus comprising: means forgenerating a prompt replica of the local code; means for generating alate replica of the local code and an early replica of the local codebased on shifting the prompt replica by half of a chip at most; meansfor correlating the early, prompt, and late replicas of the local codewith the received signal; means for determining an early correlatorpower, a prompt correlator power, and a late correlator power based onthe correlations of the replicas of the local code with the receivedsignal; means for calculating a discrimination output based on comparingthe early correlator power and the late correlator power and normalizingthe comparison based on the early correlator power, the late correlatorpower, and the prompt correlator power; and means for adjusting a rateof the local code based on the discrimination output.
 11. The apparatusof claim 10, wherein the means for generating the prompt replica of thelocal code comprises means for generating the prompt replica of apseudo-random noise code.
 12. The apparatus of claim 10, wherein themeans for generating the prompt replica of the local code comprisesmeans for generating the prompt replica of a clear/acquisition code usedby a global positioning satellite.
 13. The apparatus of claim 10,wherein the means for calculating the discrimination output based on theearly correlator power, the prompt correlator power, and the latecorrelator power comprises: means for determining if the earlycorrelator power is greater than the late correlator power; and meansfor calculating the discrimination output based on a quotient, when theearly correlator power is greater than the late correlator power,wherein a numerator of the quotient is based on a difference between theearly correlator power and the late correlator power and a denominatorof the quotient is based on a first factor times a difference betweenthe early correlator power and the prompt correlator power and a secondfactor times a difference between the late correlator power and theprompt correlator power.
 14. The apparatus of claim 13, wherein themeans for calculating the discrimination output based on the earlycorrelator power, the prompt correlator power, and the late correlatorpower when the correlator spacing is ½ chip comprises: means forcalculating the discrimination output based on the quotient, when theearly correlator power is greater than the late correlator power,wherein the numerator of the quotient is equal to the difference betweenthe early correlator power and the late correlator power and thedenominator of the quotient is equal to 4/3 times the difference betweenthe early correlator power and the prompt correlator power minus fourtimes the difference between the late correlator power and the promptcorrelator power.
 15. The apparatus of claim 10, wherein the means forcalculating the discrimination output based on the early correlatorpower, the prompt correlator power, and the late correlator powercomprises: means for determining if the early correlator power is lessthan the late correlator power; and means for calculating thediscrimination output based on a quotient, when the early correlatorpower is less than the late correlator power, wherein a numerator of thequotient is based on a difference between the early correlator power andthe late correlator power and a denominator of the quotient is based ona first factor times a difference between the late correlator power andthe prompt correlator power and a second factor times a differencebetween the early correlator power and the prompt correlator power. 16.The apparatus of claim 15, wherein the means for calculating thediscrimination output based on the early correlator power, the promptcorrelator power, and the late correlator power for correlator spacingsof ½ chip comprises: means for calculating the discrimination outputbased on the quotient, when the early correlator power is less than thelate correlator power, wherein the numerator of the quotient is equal totwo the difference between the early correlator power and the latecorrelator power and the denominator of the quotient is equal to 4/3times the difference between the late correlator power and the promptcorrelator power minus four times the difference between the earlycorrelator power and the prompt correlator power.
 17. A delay lock loopconfigured to track a pseudo random noise code in a received signal,said delay lock loop comprising: a code generator that generates aprompt replica of the local code, a late replica of the local code andan early replica of the local code based on shifting the prompt replicaby half of a chip at most; a demodulator configured to correlate theearly, prompt, and late replicas of the local code with the receivedsignal; a processor configured to calculate an early correlator power, aprompt correlator power, and a late correlator power based on thecorrelations of the replicas of the local code with the received signal;a code discriminator configured to calculate a discrimination outputbased on comparing the early correlator power and the late correlatorpower and normalizing the comparison based on the early correlatorpower, the late correlator power, and the prompt correlator power; and afeedback module configured to provide a signal that indicates anadjustment to a rate of the local code generated by the code generatorbased on the discrimination output.
 18. The delay lock loop of claim 15,wherein the code generator is configured to generate the early, prompt,and late code replicas based on an even spacing of at most ½ of a chip.19. The delay lock loop of claim 15, wherein the code generator isconfigured to generate the early, prompt, and late code replicas basedon an unequal spacing.
 20. The delay lock loop of claim 17, wherein thecode generator is configured to generate the early code replica based ona spacing from the prompt code replica that is greater than a spacingfrom the prompt code replica to the late code replica.